Template Version: @(#)onepager.txt 1.35 07/11/07 SMI Copyright 2007 Sun Microsystems 1. Introduction 1.1. Project/Component Working Name: Hardware Descriptor changes to support OPL Ikkaku platform. 1.2. Name of Document Author/Supplier: Sunit Jain (S.Jain@Sun.Com) 1.3. Date of This Document: 02/25/2008 1.3.1. Date this project was conceived: September 2007 1.4. Name of Major Document Customer(s)/Consumer(s): 1.4.1. The PAC or CPT you expect to review your project: N/A 1.4.2. The ARC(s) you expect to review your project: FWARC 1.4.3. The Director/VP who is "Sponsoring" this project: Mike Sanfratello 1.4.4. The name of your business unit: Common Software Features, Firmware 1.5. Email Aliases: 1.5.1. Responsible Manager: David.Banman@Sun.Com 1.5.2. Responsible Engineer: S.Jain@Sun.Com 1.5.3. Marketing Manager: 1.5.4. Interest List: opl-jupiter-os@sun.com, opl-jupiter-obp@sun.com 2. Project Summary 2.1. Project Description: OPL Ikkaku delivers a new 2U Form Factor, low-end server using existing hardware and software components from OPL platform. OPL product line, aka SPARC-Enterprise M-series server, is the current generation of midrange and highend server offering. Ikkaku platform build on proven technology and will add a new low-end offering to the OPL line. Each Ikkaku system contains a single processor (SPARC64-VII, codename Jupiter CPU), that has 4 cores with two strands each (total 8 computational threads). Hardware Descriptor table, as defined for OPL line of servers, needs to be slightly modified to support Ikkaku platform to address the change in the IO heirarchy. 2.2. Risks and Assumptions: OPL Ikkaku has very aggressive RR schedule. Current scheduled RR date is October 2008, with P0 hardware not available until April 2008. P1 hardware will not be available until June 2008. 3. Business Summary 3.1. Problem Area: Current OPL Product Line comprises of midrange and highend servers. There are business opportunities in the low-end server market with high computation power. OPL Ikkaku product takes advantage of existing hardware and software investment and offer a competitive performer in the low-end computational server market that is not addressed by existing Sun product family. 3.2. Market/Requester: There is continued demand for 64-bit computing platforms based on SPARC. OPL Ikkaku will address a market segment not sufficiently covered today. 3.3. Business Justification: New revenue stream. 3.4. Competitive Analysis: OPL Ikkaku addresses the low end market segment that requires computation performance for small to medium workload. 3.5. Opportunity Window/Exposure: OPL Ikkaku will be available around Oct CY2008. 3.6. How will you know when you are done?: When code changes are integrated in the OpenBoot 4.x and 4.24 gates without any regression to existing OPL line of servers. Same OpenBoot binary would support Ikkaku and OPL line of servers. 4. Technical Description: 4.1. Details: Hardware Descriptor (HWD) structure for OPL was initially defined by FWARC/2005/261 and later updated by FWARC/2006/427, FWARC/2007/412 and FWARC/2007/581. To support Ikkaku platform, there are minor changes to existing Hardware Descriptor because of the change in the IO topology for Ikkaku as compared to the OPL line of Servers. In addition, a new value for platform model is added for Ikkaku platform. Following are the details of all the changes : 4.1.1 Change to "model_information" field Section 3.4 of HWD.txt adds a new value to "model_information" field for the new Ikkaku platform: uint32_t model_information System model FF1/FF2/DC1/DC2/DC3/ Ikkaku. 1:FF1, 2:FF2, 3:DC1, 4:DC2, 5:DC3 6:Ikkaku 4.1.2 Update to "boot_mode" field Section 3.4 of HWD.txt fixes the definition of "boot_mode" field. Original description was incorrect. This is not Ikkaku specific change: uint8_t boot_mode Boot control direction set by XSCF. 0x10 : Enter POST monitor after POST completes. 0x20 : Invoke POST Test Program. 0x00, Other : Enter OpenBoot after POST is completed. Options 0x10 & 0x20 are for Sun/FJ internal/field use only. 4.1.3 Update to PCI Channel Leaf structure Section 3.5.6.2.1 of HWD.txt is updates the union structure to add Ikkaku specific onboard IO leaf A & leaf B: uint32_t type; /* 1:FF onboard, 2:IOUA, 3:slot */ /* 4:Ikkaku leaf A, 5:Ikkaku leaf B */ union { /* Union based on type field */ hwdesc_ff_onboard_t ff_onboard; /* Onboard IO FF systems */ hwdesc_ioua_t ioua; /* IO unit DC systems */ hwdesc_iou_slot_desc_t slot; /* PCIE slot */ hwdesc_ikk_leafa_t ikk_leafa; /* Ikkaku leaf A */ hwdesc_ikk_leafb_t ikk_leafb; /* Ikkaku leaf B */ uint8_t spare[448]; /* 448 byes size of union*/ } u; Section 3.5.6.2.1.4 of HWD.txt defines the Ikkaku onboard IO leaf A structure: typedef struct { hwdesc_stat_t switch_status; /* PCIE switch stat */ uint8_t fill[68]; /* Filler */ hwdesc_stat_t sas_status; /* SAS status */ hwdesc_stat_t gbe0_status; /* GbE#0 status */ uint8_t fill2[280]; /* Filler */ hwdesc_slot_t eslot0; /* PCIE slot info (PCI#0) */ uint8_t fill3[40]; /* Filler */ hwdesc_stat_t gbe1_status; /* GbE#1 status */ } hwdesc_ikk_leafa_t; Section 3.5.6.2.1.5 of HWD.txt defines the Ikkaku onboard IO leaf B structure: typedef struct { uint8_t fill[80]; /* Filler */ hwdesc_slot_t eslot1; /* PCIE slot info (PCI#1) */ hwdesc_slot_t eslot2; /* PCIE slot info (PCI#2) */ hwdesc_slot_t eslot3; /* PCIE slot info (PCI#3) */ } hwdesc_ikk_leafb_t; 4.2. Bug/RFE Number(s): CR 6665538 4.3. In Scope: N/A 4.4. Out of Scope: N/A 4.5. Interfaces: Imported Interfaces --------------------------------------------------------------------------- Name Classification Comments -------------------------- ---------------- ---------------------------- HWD table Uncommitted FWARC/2007/581 --------------------------------------------------------------------------- Exported Interfaces --------------------------------------------------------------------------- Name Classification Comments -------------------------- ---------------- ---------------------------- "IKKAKU" Uncommited "model_information" field value for Ikkaku platforms Onboard IO Leaf A Uncommited Defined in section structure for Ikkaku 3.5.6.2.1.4 in HWD.txt Onboard IO Leaf B Uncommited Defined in section structure for Ikkaku 3.5.6.2.1.5 in HWD.txt --------------------------------------------------------------------------- 4.6. Doc Impact: None 4.7. Admin/Config Impact: None 4.8. HA Impact: None 4.9. I18N/L10N Impact: None 4.10. Packaging & Delivery: The changes would be delivered as a part of XCP package for OPL/Ikkaku platforms. 4.11. Security Impact: None 4.12. Dependencies: Domin software (POST, OpenBoot, Solaris) is dependent on the SCF (SP) firmware to setup the contents of Hardware Descriptor table appropriately for a particular platform. 5. Reference Documents: [1] Hardware Descriptor bindings FWARC/2007/581 http://sac.eng/Archives/CaseLog/arc/FWARC/2007/581/materials/HWD.txt 6. Resources and Schedule: 6.1. Projected Availability: FY08 Q4 6.2. Cost of Effort: 1 person month 6.3. Cost of Capital Resources: 6.4. Product Approval Committee requested information: 6.4.1. Consolidation or Component Name: XCF 6.4.3. Type of CPT Review and Approval expected: FastTrack 6.4.4. Project Boundary Conditions: 6.4.5. Is this a necessary project for OEM agreements: 6.4.6. Notes: 6.4.7. Target RTI Date/Release: 4.24 & 4.x OpenBoot gates, May 2008 6.4.8. Target Code Design Review Date: May 2008 6.4.9. Update approval addition: None 6.5. ARC review type: FastTrack 6.6. ARC Exposure: Open 6.6.1. Rationale: NA 7. Prototype Availability: 7.1. Prototype Availability: March 2008 7.2. Prototype Cost: 1 person month