------- pci-e.binding.txt -------
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< #pragma ident "@(#)pci-e.binding.txt 1.6      10/02/19 SMI"
< Copyright 2010 Sun Microsystems Inc. All rights reserved.
---
> #pragma ident "@(#)pci-e.binding.txt  1.5     09/11/30 SMI"
> Copyright 2009 Sun Microsystems Inc. All rights reserved.
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<                 Deleted old revision history.
<                 Deleted original authors list.
<
< 18 Feb 2010  - Modified section 3 to describe numerical representation
<                of ARI enabled devices.  Also added section 11 to describe
<                "ari-enabled" property and added couple of more references
<                to section 12.
---
>               Deleted old revision history.
>               Deleted original authors list.
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<           1 MB (for Memory), or below 64 KB (for relocatable I/O).
---
>       1 MB (for Memory), or below 64 KB (for relocatable I/O).
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<    ddddd      is the 5-bit Device Number (these 5 bits may be used as
<                 extended function bits, see note related to ARI below)
---
>    ddddd      is the 5-bit Device Number
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<       ddddd   is the 5-bit Device Number.  (these 5 bits may be used as
<                 extended function bits, see note related to ARI below)
---
>       ddddd   is the 5-bit Device Number.
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<
<       Note : 5 bits of device number may be used as extended function bits,
<              see note related to ARI below
<
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<
<       Note : 5 bits of device number may be used as extended function bits,
<              see note related to ARI below
<
---
>
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<
< Note related to Alternate Routing ID (ARI) support :
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<     If device supports Alternate Routing ID (ARI) forwarding extended
<     capability and if the root-port or down-stream port above it also
<     supports ARI capability then all of the "d" bits in the Routing ID (RID)
<     are extended function number bits. If ARI is enabled, we are using the
<     alternate interpretation of the RID, which used the dddd.d bits as
<     extended function number bits. In this case the device number is implied
<     to be always zero and the function number is extended to 8 bits (5 bits of
<     d bits and 3 bits of f bits).  The "ari-enabled" property defined in
<     section 11 below must also be present in the bridge node directly above
<     the ARI capable function.
<
<
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<
<
< 11. "ari-enabled" property in pci-pci bridge nodes.
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<     "ari-enabled"                  S
---
> 11. References
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<     Standard property name to indicate that ARI is enabled in a
<     root or downstream switch port.
<
<     prop-encoded-array: No value. The existence of the property
<     indicates that ARI is enabled in this node.
<
< 12. References
<
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<
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<
<  [3] PCI Express Base Spec, v2.1, available at pcisig.com
<      Note: See Section 6.13, ARI.
<
<  [4] Single Root IO Virtualization, available at pcisig.com
<
<  [5] PCI Binding to Open Firmware, available at http://playground.sun.com/1275