From jhd@stickit.eng.sun.com Sat Oct 13 08:50:55 2007 Received: from sunmail3mpk.sfbay.sun.com (sunmail3mpk [129.146.11.52]) by sac.sfbay.sun.com (8.13.8+Sun/8.13.8) with ESMTP id l9DFotnD019366 for ; Sat, 13 Oct 2007 08:50:55 -0700 (PDT) Received: from nwk-avmta-1.SFBay.Sun.COM (nwk-avmta-1.SFBay.Sun.COM [129.146.11.74]) by sunmail3mpk.sfbay.sun.com (8.13.7+Sun/8.13.7/ENSMAIL,v2.2) with ESMTP id l9DFlbRZ005280; Sat, 13 Oct 2007 08:47:38 -0700 (PDT) Received: from pmxchannel-daemon.nwk-avmta-1.sfbay.Sun.COM by nwk-avmta-1.sfbay.Sun.COM (Sun Java System Messaging Server 6.2-3.04 (built Jul 15 2005)) id <0JPU00E03X7DKT00@nwk-avmta-1.sfbay.Sun.COM>; Sat, 13 Oct 2007 08:47:37 -0700 (PDT) Received: from sca-ea-mail-2.sun.com ([192.18.43.25]) by nwk-avmta-1.sfbay.Sun.COM (Sun Java System Messaging Server 6.2-3.04 (built Jul 15 2005)) with ESMTP id <0JPU00AVXX7DV610@nwk-avmta-1.sfbay.Sun.COM>; Sat, 13 Oct 2007 08:47:37 -0700 (PDT) Received: from stickit.Eng.Sun.COM ([129.146.226.107]) by sca-ea-mail-2.sun.com (8.13.7+Sun/8.12.9) with ESMTP id l9DFlbOr011251; Sat, 13 Oct 2007 15:47:37 +0000 (GMT) Received: from stickit.Eng.Sun.COM (localhost [127.0.0.1]) by stickit.Eng.Sun.COM (8.13.3+Sun/8.13.1) with ESMTP id l9DF3psJ020115; Sat, 13 Oct 2007 08:03:51 -0700 (PDT) Received: (from jhd@localhost) by stickit.Eng.Sun.COM (8.13.3+Sun/8.13.1/Submit) id l9DF3odB020111; Sat, 13 Oct 2007 08:03:50 -0700 (PDT) Date: Sat, 13 Oct 2007 08:03:50 -0700 (PDT) From: John Danielson Subject: Intel CPU and 5000/7300 Series Chipset FMA [PSARC/2007/594 Self Review] To: PSARC-ext@sun.com Cc: fma-core@sun.com Message-id: <200710131503.l9DF3odB020111@stickit.Eng.Sun.COM> Content-transfer-encoding: 7BIT X-PMX-Version: 5.2.0.264296 Status: RO Content-Length: 2812 Template Version: @(#)sac_nextcase 1.64 07/13/07 SMI This information is Copyright 2007 Sun Microsystems 1. Introduction 1.1. Project/Component Working Name: Intel CPU and 5000/7300 Series Chipset FMA 1.2. Name of Document Author/Supplier: Author: Gavin Maltby 1.3 Date of This Document: 13 October, 2007 4. Technical Description This information is Copyright 2007 Sun Microsystems 1. Introduction 1.1. Project/Component Working Name: Intel CPU and 5000/7300 Series Chipset FMA 1.2. Name of Document Author/Supplier: Author: Adrian Frost 1.3 Date of This Document: 11 October, 2007 4. Technical Description 4.1. Project Summary 4.1.1 Project Description: This case introduces FMA events for Intel x86 CPUs (i.e., Intel IA-32 and Intel 64 architectures) that implement the Intel machine check architecture. This includes, but is not limited to, the cpu models that are used in the upcoming Sun Intel x64 systems. This case also introduces FMA events for the Intel 5000 and 7300 series chipset memory-controller hubs (MCH), as also used in the upcoming Sun Intel x64 systems (with the exception of the Ultra 24 "Ursa" workstation which uses a different chipset). The associated FMA portfolio referenced below has already been approved at FMA Portfolio Review. 4.1.2 Details: CPU error handling and collection of telemetry for diagnosis is performed by the generic MCA cpu module cpu.generic (see PSARC/2007/591). The Intel model-specific support layers on top of cpu.generic as module cpu_ms.GenuineIntel, and provides a new ereport.cpu.intel.* subclass to ereports which are otherwise unchanged from what cpu.generic has provided. This new subclass allows a distinct set of eversholt diagnosis rules to be applied instead of the generic MCA rules, and a corresponding set of fault.cpu.intel.* diagnoses may be produced. A new driver 'intel_nb5000' provides support for the 5000 and 7300 series memory-controller hubs. This driver handles MCH errors associated with the fully-buffered DIMMs that these chipsets control, and raise telemetry in the ereport class ereport.cpu.intel.nb.*. A set of eversholt rules consumes this telemetry and may produce fault.memory.intel.* diagnoses. The accompanying ercheck.html details all changes to the SMI Events Registry. The approved FMA portfoliois here: http://wikihome.sfbay.sun.com/fma-portfolio/Wiki.jsp?page=2007.022.Intel 4.9 I18N/L10N Impact: A new FMA dictionary and .po/.mo "INTEL" is delivered. 5. Reference Documents: PSARC/2007/591 Generic x86 Machine Check Architecture FMA 6. Resources and Schedule 6.4. Steering Committee requested information 6.4.1. Consolidation C-team Name: ON 6.5. ARC review type: Automatic 6.6. ARC Exposure: open From cindi@sun.com Mon Nov 19 14:56:51 2007 Received: from newsunmail1brm.central.sun.com (newsunmail1brm.Central.Sun.COM [129.147.62.245]) by sac.sfbay.sun.com (8.13.8+Sun/8.13.8) with ESMTP id lAJMuoW6014872 for ; Mon, 19 Nov 2007 14:56:50 -0800 (PST) Received: from brm-avmta-1.central.sun.com (brm-avmta-1.Central.Sun.COM [129.147.4.11]) by newsunmail1brm.central.sun.com (8.13.7+Sun/8.13.7/ENSMAIL,v2.2) with ESMTP id lAJMuo7d030635; Mon, 19 Nov 2007 15:56:50 -0700 (MST) Received: from pmxchannel-daemon.brm-avmta-1.central.sun.com by brm-avmta-1.central.sun.com (Sun Java System Messaging Server 6.2-3.04 (built Jul 15 2005)) id <0JRR00901ZQQ1200@brm-avmta-1.central.sun.com>; Mon, 19 Nov 2007 15:56:50 -0700 (MST) Received: from jurassic-x4600.sfbay.sun.com ([129.146.17.59]) by brm-avmta-1.central.sun.com (Sun Java System Messaging Server 6.2-3.04 (built Jul 15 2005)) with ESMTP id <0JRR002D3ZQP3X70@brm-avmta-1.central.sun.com>; Mon, 19 Nov 2007 15:56:49 -0700 (MST) Received: from [129.146.228.215] (ozz.SFBay.Sun.COM [129.146.228.215]) by jurassic-x4600.sfbay.sun.com (8.14.1+Sun/8.14.1) with ESMTP id lAJMun0T225917; Mon, 19 Nov 2007 14:56:49 -0800 (PST) Date: Mon, 19 Nov 2007 16:59:38 -0800 From: Cynthia McGuire Subject: Intel CPU and 5000/7300 Series Chipset FMA [PSARC/2007/594 Self Review] To: PSARC-ext@sun.com Cc: fma-core@sun.com Message-id: <4742317A.3060101@sun.com> MIME-version: 1.0 Content-type: text/plain; charset=ISO-8859-1; format=flowed Content-transfer-encoding: 7BIT X-PMX-Version: 5.2.0.264296 User-Agent: Thunderbird 1.5.0.8 (X11/20061204) Status: RO Content-Length: 67 I am updating this case to include a patch release binding. Cindi