From tl41329@sac.sfbay.sun.com Fri Dec 14 02:07:41 2007 Received: from sunmail3mpk.sfbay.sun.com (sunmail3mpk [129.146.11.52]) by sac.sfbay.sun.com (8.13.8+Sun/8.13.8) with ESMTP id lBEA7fUu004896 for ; Fri, 14 Dec 2007 02:07:41 -0800 (PST) Received: from nwk-avmta-2.sfbay.sun.com (nwk-avmta-2.SFBay.Sun.COM [129.145.155.6]) by sunmail3mpk.sfbay.sun.com (8.13.7+Sun/8.13.7/ENSMAIL,v2.2) with ESMTP id lBEA7eoS005977; Fri, 14 Dec 2007 02:07:40 -0800 (PST) Received: from pmxchannel-daemon.nwk-avmta-2.sfbay.sun.com by nwk-avmta-2.sfbay.sun.com (Sun Java System Messaging Server 6.2-3.04 (built Jul 15 2005)) id <0JT100201ASSTE00@nwk-avmta-2.sfbay.sun.com>; Fri, 14 Dec 2007 02:07:40 -0800 (PST) Received: from dm-sfbay-02.sfbay.sun.com ([129.146.11.31]) by nwk-avmta-2.sfbay.sun.com (Sun Java System Messaging Server 6.2-3.04 (built Jul 15 2005)) with ESMTP id <0JT100MA9ASS7Y30@nwk-avmta-2.sfbay.sun.com>; Fri, 14 Dec 2007 02:07:40 -0800 (PST) Received: from sac.sfbay.sun.com (sac.SFBay.Sun.COM [129.146.226.132]) by dm-sfbay-02.sfbay.sun.com (8.13.8+Sun/8.13.8/ENSMAIL,v2.2) with ESMTP id lBEA7dXM036530; Fri, 14 Dec 2007 02:07:39 -0800 (PST) Received: from sac.sfbay.sun.com (localhost [127.0.0.1]) by sac.sfbay.sun.com (8.13.8+Sun/8.13.8) with ESMTP id lBEA08Xh004760; Fri, 14 Dec 2007 02:00:08 -0800 (PST) Received: (from tl41329@localhost) by sac.sfbay.sun.com (8.13.8+Sun/8.13.8/Submit) id lBEA08BW004756; Fri, 14 Dec 2007 02:00:08 -0800 (PST) Date: Fri, 14 Dec 2007 02:00:08 -0800 (PST) From: Tzongyu Paul Lee Subject: Addition ioctl support for Intel G33/Q33,Q35 chipsets in i915 driver [PSARC/2007/690 FastTrack timeout 12/21/2007] To: PSARC-ext@sun.com Message-id: <200712141000.lBEA08BW004756@sac.sfbay.sun.com> Content-transfer-encoding: 7BIT X-PMX-Version: 5.2.0.264296 Status: RO Content-Length: 2382 I am sponsoring this fast-track for Edward Shu. It is a straightforward case of adding a new graphics-specific ioctl for new Intel chipsets. I think it qualifies for self-review, but if anyone disagrees, let me know and I'll promote it to a fast track. Requested release binding is patch, and the timer is set to 12/21/2007. Template Version: @(#)sac_nextcase 1.64 07/13/07 SMI This information is Copyright 2007 Sun Microsystems 1. Introduction 1.1. Project/Component Working Name: Addition ioctl support for Intel G33/Q33,Q35 chipsets in i915 driver 1.2. Name of Document Author/Supplier: Author: Edward Shu 1.3 Date of This Document: 14 December, 2007 4. Technical Description Addition ioctl support for Intel G33/Q33,Q35 chipsets in i915 driver 1. Summary DRM (direct rendering management) kernel module and i915 driver were introduced to Solaris in PSARC 2004/801. The ioctl's exported by this driver include both hardware independent and hardware dependent ones. Recently, Intel released their G33/Q33,Q35 chipsets with embedded graphics that required a new Intel specific ioctl in the driver. This case documents this new ioctl. 2. Discussion The third argument of the prefixioctl (ioctl(9E)) should point to the structure below. The usage of the first argument 'dev' and the second argument 'cmd' follow the same pattern of other ioctl's. struct drm_i915_hws_addr { uint64_t addr; /* the offset of hardware status page */ }; 3. Interface Table ----------------------------------------------------------------------------------------- | Interface exported | Classifications | Comments | ----------------------------------------------------------------------------------------- | DRM_IOCTL_I915_HWS_ADDR | External | Set the offset of hardware status page | ----------------------------------------------------------------------------------------- 4. References: CR6604682 DRM support for Intel G/Q 3 series 5. Documentation Change The i915(7D) man page shall include additional chipset support information by the i915 driver with this change. 6. Resources and Schedule 6.4. Steering Committee requested information 6.4.1. Consolidation C-team Name: ON 6.5. ARC review type: FastTrack 6.6. ARC Exposure: open From Tzongyu.Lee@sun.com Mon Dec 31 02:19:56 2007 Received: from sunmail5.uk.sun.com (sunmail5.UK.Sun.COM [129.156.85.165]) by sac.sfbay.sun.com (8.13.8+Sun/8.13.8) with ESMTP id lBVAJtmc024937 for ; Mon, 31 Dec 2007 02:19:55 -0800 (PST) Received: from nwk-avmta-2.sfbay.sun.com (nwk-avmta-2.SFBay.Sun.COM [129.145.155.6]) by sunmail5.uk.sun.com (8.13.8+Sun/8.13.8/ENSMAIL,v2.2) with ESMTP id lBVAJrgY010421 for <@sunmail2sca.sfbay.sun.com:PSARC-ext@sun.com>; Mon, 31 Dec 2007 10:19:54 GMT Received: from pmxchannel-daemon.nwk-avmta-2.sfbay.sun.com by nwk-avmta-2.sfbay.sun.com (Sun Java System Messaging Server 6.2-3.04 (built Jul 15 2005)) id <0JTW00L01SP58P00@nwk-avmta-2.sfbay.sun.com> for PSARC-ext@sun.com (ORCPT PSARC-ext@sun.com); Mon, 31 Dec 2007 02:19:53 -0800 (PST) Received: from sineb-mail-1.sun.com ([192.18.19.6]) by nwk-avmta-2.sfbay.sun.com (Sun Java System Messaging Server 6.2-3.04 (built Jul 15 2005)) with ESMTP id <0JTW00K1XSP3FF10@nwk-avmta-2.sfbay.sun.com> for PSARC-ext@sun.com (ORCPT PSARC-ext@sun.com); Mon, 31 Dec 2007 02:19:52 -0800 (PST) Received: from fe-apac-05.sun.com (fe-apac-05.sun.com [192.18.19.176] (may be forged)) by sineb-mail-1.sun.com (8.13.6+Sun/8.12.9) with ESMTP id lBVAJp9Y013443 for ; Mon, 31 Dec 2007 10:19:51 +0000 (GMT) Received: from conversion-daemon.mail-apac.sun.com by mail-apac.sun.com (Sun Java System Messaging Server 6.2-6.01 (built Apr 3 2006)) id <0JTW00401SCK4800@mail-apac.sun.com> (original mail from Tzongyu.Lee@Sun.COM) for PSARC-ext@sun.com (ORCPT PSARC-ext@sun.com); Mon, 31 Dec 2007 18:19:51 +0800 (SGT) Received: from [129.158.218.85] by mail-apac.sun.com (Sun Java System Messaging Server 6.2-6.01 (built Apr 3 2006)) with ESMTPSA id <0JTW00LPGSP2PBY4@mail-apac.sun.com> for PSARC-ext@sun.com (ORCPT PSARC-ext@sun.com); Mon, 31 Dec 2007 18:19:51 +0800 (SGT) Date: Mon, 31 Dec 2007 18:19:08 +0800 From: Tzongyu Paul Lee Subject: Re: Addition ioctl support for Intel G33/Q33,Q35 chipsets in i915 driver [PSARC/2007/690 FastTrack timeout 12/21/2007] In-reply-to: <200712141000.lBEA08BW004756@sac.sfbay.sun.com> Sender: Tzongyu.Lee@sun.com To: PSARC-ext@sun.com Reply-to: Tzongyu.Lee@sun.com Message-id: <4778C21C.7070306@Sun.COM> MIME-version: 1.0 Content-type: text/plain; charset=GB2312 Content-transfer-encoding: 8BIT X-PMX-Version: 5.2.0.264296 References: <200712141000.lBEA08BW004756@sac.sfbay.sun.com> User-Agent: Thunderbird 2.0.0.4 (X11/20070723) Status: RO Content-Length: 2740 Timed out 12/21/2007. Closed approved. T. Paul --- Tzongyu Paul Lee дµÀ: > I am sponsoring this fast-track for Edward Shu. > It is a straightforward case of adding a new graphics-specific > ioctl for new Intel chipsets. > I think it qualifies for self-review, but if anyone disagrees, > let me know and I'll promote it to a fast track. > Requested release binding is patch, and the timer is set to > 12/21/2007. > > > Template Version: @(#)sac_nextcase 1.64 07/13/07 SMI > This information is Copyright 2007 Sun Microsystems > 1. Introduction > 1.1. Project/Component Working Name: > Addition ioctl support for Intel G33/Q33,Q35 chipsets in i915 driver > 1.2. Name of Document Author/Supplier: > Author: Edward Shu > 1.3 Date of This Document: > 14 December, 2007 > 4. Technical Description > Addition ioctl support for Intel G33/Q33,Q35 chipsets in i915 driver > > 1. Summary > DRM (direct rendering management) kernel module and i915 driver were introduced to Solaris in > PSARC 2004/801. The ioctl's exported by this driver include both hardware independent > and hardware dependent ones. Recently, Intel released their G33/Q33,Q35 chipsets > with embedded graphics that required a new Intel specific ioctl in the driver. > This case documents this new ioctl. > > 2. Discussion > The third argument of the prefixioctl (ioctl(9E)) should point to the structure > below. The usage of the first argument 'dev' and the second argument 'cmd' follow > the same pattern of other ioctl's. > > struct drm_i915_hws_addr { > uint64_t addr; /* the offset of hardware status page */ > }; > > 3. Interface Table > ----------------------------------------------------------------------------------------- > | Interface exported | Classifications | Comments | > ----------------------------------------------------------------------------------------- > | DRM_IOCTL_I915_HWS_ADDR | External | Set the offset of hardware status page | > ----------------------------------------------------------------------------------------- > > 4. References: > CR6604682 DRM support for Intel G/Q 3 series > > 5. Documentation Change > The i915(7D) man page shall include additional chipset > support information by the i915 driver with this change. > > > 6. Resources and Schedule > 6.4. Steering Committee requested information > 6.4.1. Consolidation C-team Name: > ON > 6.5. ARC review type: FastTrack > 6.6. ARC Exposure: open > > -- Tzongyu Paul Lee, Tzongyu.Lee@Sun.Com or Paul.Lee@Sun.COM BJS05 7225, x84343 http://blogs.sun.com/tpaullee/ Feel the Pulses of China http://tpaullee.blogspot.com/