`ercheck Report`

Workspace:	/tank/ws/af/events-nehalem
Host:	hyper
As of:	Thu Jul 24 05:15:26 PDT 2008
Compare to:	/net/events.central/events-gate

New Events

[leaf]

ereport.cpu.generic-x86.internal_parity

Description:

Simple error class - internal parity

**Payload 0**
Inherit version 0 from ereport
Inherit version 0 from ereport.cpu
Inherit version 0 from ereport.cpu.generic-x86
IA32_MCG_STATUS	uint64_t	MCG_STATUS value when MCA banks were read
IA32_MCi_ADDR	uint64_t	MCi_ADDR raw value, included if MCi_STATUS.ADDRV indicates address valid
IA32_MCi_MISC	uint64_t	MCi_MISC raw value, included if MCi_STATUS.MISCV indicates misc register valid
IA32_MCi_STATUS	uint64_t	MCi_STATUS raw value
bank_msr_offset	uint64_t	MSR offset of MCi_CTL register for this bank
bank_number	uint8_t	MCA bank number - N'th set of MCi{CTL,STATUS,ADDR,MISC}
error_code	uint16_t	MCi_STATUS architectural error code - bits 15-0
error_enabled	boolean value	Set if MCi_STATUS.EN indicates #MC was enabled for this error type
error_uncorrected	boolean value	Set if MCi_STATUS.UC indicates uncorrected
ip	uint64_t	Instruction pointer for machine checks, if MCG_STATUS.EIPV
machine_check_in_progress	boolean value	MCG_STATUS.MCIP
model_specific_error_code	uint16_t	MCi_STATUS model-specific error code - bits 31-16
overflow	boolean_value	Set if MCi_STATUS.OVER indicates an overflow
privileged	boolean value	For #MC indicates if interrupted IP was kernel/user
processor_context_corrupt	boolean value	Set if MCi_STATUS.PCC indicates corruption
threshold_based_error_status	string	No tracking, Green - below threshold, Yellow - above threshold, Reserved

[leaf]

ereport.cpu.generic-x86.mc

Description:

error class - memory error

**Payload 0**
Inherit version 0 from ereport
Inherit version 0 from ereport.cpu
Inherit version 0 from ereport.cpu.generic-x86
IA32_MCG_STATUS	uint64_t	MCG_STATUS value when MCA banks were read
IA32_MCi_ADDR	uint64_t	MCi_ADDR raw value, included if MCi_STATUS.ADDRV indicates address valid
IA32_MCi_MISC	uint64_t	MCi_MISC raw value, included if MCi_STATUS.MISCV indicates misc register valid
IA32_MCi_STATUS	uint64_t	MCi_STATUS raw value
bank_msr_offset	uint64_t	MSR offset of MCi_CTL register for this bank
bank_number	uint8_t	MCA bank number - N'th set of MCi{CTL,STATUS,ADDR,MISC}
error_code	uint16_t	MCi_STATUS architectural error code - bits 15-0
error_enabled	boolean value	Set if MCi_STATUS.EN indicates #MC was enabled for this error type
error_uncorrected	boolean value	Set if MCi_STATUS.UC indicates uncorrected
ip	uint64_t	Instruction pointer for machine checks, if MCG_STATUS.EIPV
machine_check_in_progress	boolean value	MCG_STATUS.MCIP
model_specific_error_code	uint16_t	MCi_STATUS model-specific error code - bits 31-16
overflow	boolean_value	Set if MCi_STATUS.OVER indicates an overflow
privileged	boolean value	For #MC indicates if interrupted IP was kernel/user
processor_context_corrupt	boolean value	Set if MCi_STATUS.PCC indicates corruption
threshold_based_error_status	string	No tracking, Green - below threshold, Yellow - above threshold, Reserved

[leaf]

ereport.cpu.intel.internal_parity

Description:

Simple error class - internal parity

**Payload 0**
Inherit version 0 from ereport
Inherit version 0 from ereport.cpu
Inherit version 0 from ereport.cpu.intel
IA32_MCG_STATUS	uint64_t	MCG_STATUS value when MCA banks were read
IA32_MCi_ADDR	uint64_t	MCi_ADDR raw value, included if MCi_STATUS.ADDRV indicates address valid
IA32_MCi_MISC	uint64_t	MCi_MISC raw value, included if MCi_STATUS.MISCV indicates misc register valid
IA32_MCi_STATUS	uint64_t	MCi_STATUS raw value
bank_msr_offset	uint64_t	MSR offset of MCi_CTL register for this bank
bank_number	uint8_t	MCA bank number - N'th set of MCi{CTL,STATUS,ADDR,MISC}
error_code	uint16_t	MCi_STATUS architectural error code - bits 15-0
error_enabled	boolean value	Set if MCi_STATUS.EN indicates #MC was enabled for this error type
error_uncorrected	boolean value	Set if MCi_STATUS.UC indicates uncorrected
ip	uint64_t	Instruction pointer for machine checks, if MCG_STATUS.EIPV
machine_check_in_progress	boolean value	MCG_STATUS.MCIP
model_specific_error_code	uint16_t	MCi_STATUS model-specific error code - bits 31-16
overflow	boolean_value	Set if MCi_STATUS.OVER indicates an overflow
privileged	boolean value	For #MC indicates if interrupted IP was kernel/user
processor_context_corrupt	boolean value	Set if MCi_STATUS.PCC indicates corruption
threshold_based_error_status	string	No tracking, Green - below threshold, Yellow - above threshold, Reserved

ereport.cpu.intel.quickpath

Description:

Intel Quickpath ereports

**Payload 0**
Empty.

[leaf]

ereport.cpu.intel.quickpath.interconnect

Description:

Bus Interconnect error.

**Payload 0**
Inherit version 0 from ereport
Inherit version 0 from ereport.cpu
Inherit version 0 from ereport.cpu.intel
Inherit version 0 from ereport.cpu.intel.quickpath
IA32_MCi_ADDR	uint64_t	MCi_ADDR raw value, included if MCi_STATUS.ADDRV indicates address valid
IA32_MCi_MISC	uint64_t	MCi_MISC raw value, included if MCi_STATUS.MISCV indicates misc register valid
IA32_MCi_STATUS	uint64_t	MCi_STATUS raw value
bank_msr_offset	uint64_t	MSR offset of MCi_CTL register for this bank
error_code	uint16_t	MCi_STATUS architectural error code - bits 15-0
error_enabled	boolean value	Set if MCi_STATUS.EN indicates #MC was enabled for this error type
error_uncorrected	boolean value	Set if MCi_STATUS.UC indicates uncorrected
model_specific_error_code	uint16_t	MCi_STATUS model-specific error code - bits 31-16
overflow	boolean_value	Set if MCi_STATUS.OVER indicates an overflow
processor_context_corrupt	boolean value	Set if MCi_STATUS.PCC indicates corruption
threshold_based_error_status	string	No tracking, Green - below threshold, Yellow - above threshold, Reserved
IA32_MCG_STATUS	uint64_t	MCG_STATUS value when MCA banks were read
bank_number	uint8_t	MCA bank number - N'th set of MCi{CTL,STATUS,ADDR,MISC}
ip	uint64_t	Instruction pointer for machine checks, if MCG_STATUS.EIPV
machine_check_in_progress	boolean value	MCG_STATUS.MCIP
mem_cor_ecc_counter	uint32_t[]	MC_COR_ECC_CNT dimm correctable ECC error counters
mem_cor_ecc_counter_last	uint32_t[]	MC_COR_ECC_CNT previouse dimm correctable ECC error counters
privileged	boolean value	For #MC indicates if interrupted IP was kernel/user

[leaf]

ereport.cpu.intel.quickpath.mem_addr_parity

Description:

Bad parity detected on memory address

**Payload 0**
Inherit version 0 from ereport
Inherit version 0 from ereport.cpu
Inherit version 0 from ereport.cpu.intel
Inherit version 0 from ereport.cpu.intel.quickpath
IA32_MCi_ADDR	uint64_t	MCi_ADDR raw value, included if MCi_STATUS.ADDRV indicates address valid
IA32_MCi_MISC	uint64_t	MCi_MISC raw value, included if MCi_STATUS.MISCV indicates misc register valid
IA32_MCi_STATUS	uint64_t	MCi_STATUS raw value
bank_msr_offset	uint64_t	MSR offset of MCi_CTL register for this bank
error_code	uint16_t	MCi_STATUS architectural error code - bits 15-0
error_enabled	boolean value	Set if MCi_STATUS.EN indicates #MC was enabled for this error type
error_uncorrected	boolean value	Set if MCi_STATUS.UC indicates uncorrected
model_specific_error_code	uint16_t	MCi_STATUS model-specific error code - bits 31-16
overflow	boolean_value	Set if MCi_STATUS.OVER indicates an overflow
processor_context_corrupt	boolean value	Set if MCi_STATUS.PCC indicates corruption
threshold_based_error_status	string	No tracking, Green - below threshold, Yellow - above threshold, Reserved
IA32_MCG_STATUS	uint64_t	MCG_STATUS value when MCA banks were read
bank_number	uint8_t	MCA bank number - N'th set of MCi{CTL,STATUS,ADDR,MISC}
ip	uint64_t	Instruction pointer for machine checks, if MCG_STATUS.EIPV
machine_check_in_progress	boolean value	MCG_STATUS.MCIP
mem_cor_ecc_counter	uint32_t[]	MC_COR_ECC_CNT dimm correctable ECC error counters
mem_cor_ecc_counter_last	uint32_t[]	MC_COR_ECC_CNT previouse dimm correctable ECC error counters
privileged	boolean value	For #MC indicates if interrupted IP was kernel/user

[leaf]

ereport.cpu.intel.quickpath.mem_bad_addr

Description:

An attempt was made to access memory outside mapped space

**Payload 0**
Inherit version 0 from ereport
Inherit version 0 from ereport.cpu
Inherit version 0 from ereport.cpu.intel
Inherit version 0 from ereport.cpu.intel.quickpath
IA32_MCi_ADDR	uint64_t	MCi_ADDR raw value, included if MCi_STATUS.ADDRV indicates address valid
IA32_MCi_MISC	uint64_t	MCi_MISC raw value, included if MCi_STATUS.MISCV indicates misc register valid
IA32_MCi_STATUS	uint64_t	MCi_STATUS raw value
bank_msr_offset	uint64_t	MSR offset of MCi_CTL register for this bank
error_code	uint16_t	MCi_STATUS architectural error code - bits 15-0
error_enabled	boolean value	Set if MCi_STATUS.EN indicates #MC was enabled for this error type
error_uncorrected	boolean value	Set if MCi_STATUS.UC indicates uncorrected
model_specific_error_code	uint16_t	MCi_STATUS model-specific error code - bits 31-16
overflow	boolean_value	Set if MCi_STATUS.OVER indicates an overflow
processor_context_corrupt	boolean value	Set if MCi_STATUS.PCC indicates corruption
threshold_based_error_status	string	No tracking, Green - below threshold, Yellow - above threshold, Reserved
IA32_MCG_STATUS	uint64_t	MCG_STATUS value when MCA banks were read
bank_number	uint8_t	MCA bank number - N'th set of MCi{CTL,STATUS,ADDR,MISC}
ip	uint64_t	Instruction pointer for machine checks, if MCG_STATUS.EIPV
machine_check_in_progress	boolean value	MCG_STATUS.MCIP
mem_cor_ecc_counter	uint32_t[]	MC_COR_ECC_CNT dimm correctable ECC error counters
mem_cor_ecc_counter_last	uint32_t[]	MC_COR_ECC_CNT previouse dimm correctable ECC error counters
privileged	boolean value	For #MC indicates if interrupted IP was kernel/user

[leaf]

ereport.cpu.intel.quickpath.mem_bad_id

Description:

Memory controller received bad transaction tracker ID from interconnect

**Payload 0**
Inherit version 0 from ereport
Inherit version 0 from ereport.cpu
Inherit version 0 from ereport.cpu.intel
Inherit version 0 from ereport.cpu.intel.quickpath
IA32_MCi_ADDR	uint64_t	MCi_ADDR raw value, included if MCi_STATUS.ADDRV indicates address valid
IA32_MCi_MISC	uint64_t	MCi_MISC raw value, included if MCi_STATUS.MISCV indicates misc register valid
IA32_MCi_STATUS	uint64_t	MCi_STATUS raw value
bank_msr_offset	uint64_t	MSR offset of MCi_CTL register for this bank
error_code	uint16_t	MCi_STATUS architectural error code - bits 15-0
error_enabled	boolean value	Set if MCi_STATUS.EN indicates #MC was enabled for this error type
error_uncorrected	boolean value	Set if MCi_STATUS.UC indicates uncorrected
model_specific_error_code	uint16_t	MCi_STATUS model-specific error code - bits 31-16
overflow	boolean_value	Set if MCi_STATUS.OVER indicates an overflow
processor_context_corrupt	boolean value	Set if MCi_STATUS.PCC indicates corruption
threshold_based_error_status	string	No tracking, Green - below threshold, Yellow - above threshold, Reserved
IA32_MCG_STATUS	uint64_t	MCG_STATUS value when MCA banks were read
bank_number	uint8_t	MCA bank number - N'th set of MCi{CTL,STATUS,ADDR,MISC}
ip	uint64_t	Instruction pointer for machine checks, if MCG_STATUS.EIPV
machine_check_in_progress	boolean value	MCG_STATUS.MCIP
mem_cor_ecc_counter	uint32_t[]	MC_COR_ECC_CNT dimm correctable ECC error counters
mem_cor_ecc_counter_last	uint32_t[]	MC_COR_ECC_CNT previouse dimm correctable ECC error counters
privileged	boolean value	For #MC indicates if interrupted IP was kernel/user

[leaf]

ereport.cpu.intel.quickpath.mem_ce

Description:

Correctable memory ECC error

**Payload 0**
Inherit version 0 from ereport
Inherit version 0 from ereport.cpu
Inherit version 0 from ereport.cpu.intel
Inherit version 0 from ereport.cpu.intel.quickpath
IA32_MCi_ADDR	uint64_t	MCi_ADDR raw value, included if MCi_STATUS.ADDRV indicates address valid
IA32_MCi_MISC	uint64_t	MCi_MISC raw value, included if MCi_STATUS.MISCV indicates misc register valid
IA32_MCi_STATUS	uint64_t	MCi_STATUS raw value
bank_msr_offset	uint64_t	MSR offset of MCi_CTL register for this bank
error_code	uint16_t	MCi_STATUS architectural error code - bits 15-0
error_enabled	boolean value	Set if MCi_STATUS.EN indicates #MC was enabled for this error type
error_uncorrected	boolean value	Set if MCi_STATUS.UC indicates uncorrected
model_specific_error_code	uint16_t	MCi_STATUS model-specific error code - bits 31-16
overflow	boolean_value	Set if MCi_STATUS.OVER indicates an overflow
processor_context_corrupt	boolean value	Set if MCi_STATUS.PCC indicates corruption
threshold_based_error_status	string	No tracking, Green - below threshold, Yellow - above threshold, Reserved
IA32_MCG_STATUS	uint64_t	MCG_STATUS value when MCA banks were read
bank_number	uint8_t	MCA bank number - N'th set of MCi{CTL,STATUS,ADDR,MISC}
ip	uint64_t	Instruction pointer for machine checks, if MCG_STATUS.EIPV
machine_check_in_progress	boolean value	MCG_STATUS.MCIP
mem_cor_ecc_counter	uint32_t[]	MC_COR_ECC_CNT dimm correctable ECC error counters
mem_cor_ecc_counter_last	uint32_t[]	MC_COR_ECC_CNT previouse dimm correctable ECC error counters
privileged	boolean value	For #MC indicates if interrupted IP was kernel/user

[leaf]

ereport.cpu.intel.quickpath.mem_parity

Description:

Bad parity detected in memory write buffer or byte mask

**Payload 0**
Inherit version 0 from ereport
Inherit version 0 from ereport.cpu
Inherit version 0 from ereport.cpu.intel
Inherit version 0 from ereport.cpu.intel.quickpath
IA32_MCi_ADDR	uint64_t	MCi_ADDR raw value, included if MCi_STATUS.ADDRV indicates address valid
IA32_MCi_MISC	uint64_t	MCi_MISC raw value, included if MCi_STATUS.MISCV indicates misc register valid
IA32_MCi_STATUS	uint64_t	MCi_STATUS raw value
bank_msr_offset	uint64_t	MSR offset of MCi_CTL register for this bank
error_code	uint16_t	MCi_STATUS architectural error code - bits 15-0
error_enabled	boolean value	Set if MCi_STATUS.EN indicates #MC was enabled for this error type
error_uncorrected	boolean value	Set if MCi_STATUS.UC indicates uncorrected
model_specific_error_code	uint16_t	MCi_STATUS model-specific error code - bits 31-16
overflow	boolean_value	Set if MCi_STATUS.OVER indicates an overflow
processor_context_corrupt	boolean value	Set if MCi_STATUS.PCC indicates corruption
threshold_based_error_status	string	No tracking, Green - below threshold, Yellow - above threshold, Reserved
IA32_MCG_STATUS	uint64_t	MCG_STATUS value when MCA banks were read
bank_number	uint8_t	MCA bank number - N'th set of MCi{CTL,STATUS,ADDR,MISC}
ip	uint64_t	Instruction pointer for machine checks, if MCG_STATUS.EIPV
machine_check_in_progress	boolean value	MCG_STATUS.MCIP
mem_cor_ecc_counter	uint32_t[]	MC_COR_ECC_CNT dimm correctable ECC error counters
mem_cor_ecc_counter_last	uint32_t[]	MC_COR_ECC_CNT previouse dimm correctable ECC error counters
privileged	boolean value	For #MC indicates if interrupted IP was kernel/user

[leaf]

ereport.cpu.intel.quickpath.mem_redundant

Description:

Memory Mirroring lost due to error

**Payload 0**
Inherit version 0 from ereport
Inherit version 0 from ereport.cpu
Inherit version 0 from ereport.cpu.intel
Inherit version 0 from ereport.cpu.intel.quickpath
IA32_MCi_ADDR	uint64_t	MCi_ADDR raw value, included if MCi_STATUS.ADDRV indicates address valid
IA32_MCi_MISC	uint64_t	MCi_MISC raw value, included if MCi_STATUS.MISCV indicates misc register valid
IA32_MCi_STATUS	uint64_t	MCi_STATUS raw value
bank_msr_offset	uint64_t	MSR offset of MCi_CTL register for this bank
error_code	uint16_t	MCi_STATUS architectural error code - bits 15-0
error_enabled	boolean value	Set if MCi_STATUS.EN indicates #MC was enabled for this error type
error_uncorrected	boolean value	Set if MCi_STATUS.UC indicates uncorrected
model_specific_error_code	uint16_t	MCi_STATUS model-specific error code - bits 31-16
overflow	boolean_value	Set if MCi_STATUS.OVER indicates an overflow
processor_context_corrupt	boolean value	Set if MCi_STATUS.PCC indicates corruption
threshold_based_error_status	string	No tracking, Green - below threshold, Yellow - above threshold, Reserved
IA32_MCG_STATUS	uint64_t	MCG_STATUS value when MCA banks were read
bank_number	uint8_t	MCA bank number - N'th set of MCi{CTL,STATUS,ADDR,MISC}
ip	uint64_t	Instruction pointer for machine checks, if MCG_STATUS.EIPV
machine_check_in_progress	boolean value	MCG_STATUS.MCIP
mem_cor_ecc_counter	uint32_t[]	MC_COR_ECC_CNT dimm correctable ECC error counters
mem_cor_ecc_counter_last	uint32_t[]	MC_COR_ECC_CNT previouse dimm correctable ECC error counters
privileged	boolean value	For #MC indicates if interrupted IP was kernel/user

[leaf]

ereport.cpu.intel.quickpath.mem_spare

Description:

Memory error while deploying spare memory

**Payload 0**
Inherit version 0 from ereport
Inherit version 0 from ereport.cpu
Inherit version 0 from ereport.cpu.intel
Inherit version 0 from ereport.cpu.intel.quickpath
IA32_MCi_ADDR	uint64_t	MCi_ADDR raw value, included if MCi_STATUS.ADDRV indicates address valid
IA32_MCi_MISC	uint64_t	MCi_MISC raw value, included if MCi_STATUS.MISCV indicates misc register valid
IA32_MCi_STATUS	uint64_t	MCi_STATUS raw value
bank_msr_offset	uint64_t	MSR offset of MCi_CTL register for this bank
error_code	uint16_t	MCi_STATUS architectural error code - bits 15-0
error_enabled	boolean value	Set if MCi_STATUS.EN indicates #MC was enabled for this error type
error_uncorrected	boolean value	Set if MCi_STATUS.UC indicates uncorrected
model_specific_error_code	uint16_t	MCi_STATUS model-specific error code - bits 31-16
overflow	boolean_value	Set if MCi_STATUS.OVER indicates an overflow
processor_context_corrupt	boolean value	Set if MCi_STATUS.PCC indicates corruption
threshold_based_error_status	string	No tracking, Green - below threshold, Yellow - above threshold, Reserved
IA32_MCG_STATUS	uint64_t	MCG_STATUS value when MCA banks were read
bank_number	uint8_t	MCA bank number - N'th set of MCi{CTL,STATUS,ADDR,MISC}
ip	uint64_t	Instruction pointer for machine checks, if MCG_STATUS.EIPV
machine_check_in_progress	boolean value	MCG_STATUS.MCIP
mem_cor_ecc_counter	uint32_t[]	MC_COR_ECC_CNT dimm correctable ECC error counters
mem_cor_ecc_counter_last	uint32_t[]	MC_COR_ECC_CNT previouse dimm correctable ECC error counters
privileged	boolean value	For #MC indicates if interrupted IP was kernel/user

[leaf]

ereport.cpu.intel.quickpath.mem_ue

Description:

Uncorrected memory ECC error

**Payload 0**
Inherit version 0 from ereport
Inherit version 0 from ereport.cpu
Inherit version 0 from ereport.cpu.intel
Inherit version 0 from ereport.cpu.intel.quickpath
IA32_MCi_ADDR	uint64_t	MCi_ADDR raw value, included if MCi_STATUS.ADDRV indicates address valid
IA32_MCi_MISC	uint64_t	MCi_MISC raw value, included if MCi_STATUS.MISCV indicates misc register valid
IA32_MCi_STATUS	uint64_t	MCi_STATUS raw value
bank_msr_offset	uint64_t	MSR offset of MCi_CTL register for this bank
error_code	uint16_t	MCi_STATUS architectural error code - bits 15-0
error_enabled	boolean value	Set if MCi_STATUS.EN indicates #MC was enabled for this error type
error_uncorrected	boolean value	Set if MCi_STATUS.UC indicates uncorrected
model_specific_error_code	uint16_t	MCi_STATUS model-specific error code - bits 31-16
overflow	boolean_value	Set if MCi_STATUS.OVER indicates an overflow
processor_context_corrupt	boolean value	Set if MCi_STATUS.PCC indicates corruption
threshold_based_error_status	string	No tracking, Green - below threshold, Yellow - above threshold, Reserved
IA32_MCG_STATUS	uint64_t	MCG_STATUS value when MCA banks were read
bank_number	uint8_t	MCA bank number - N'th set of MCi{CTL,STATUS,ADDR,MISC}
ip	uint64_t	Instruction pointer for machine checks, if MCG_STATUS.EIPV
machine_check_in_progress	boolean value	MCG_STATUS.MCIP
mem_cor_ecc_counter	uint32_t[]	MC_COR_ECC_CNT dimm correctable ECC error counters
mem_cor_ecc_counter_last	uint32_t[]	MC_COR_ECC_CNT previouse dimm correctable ECC error counters
privileged	boolean value	For #MC indicates if interrupted IP was kernel/user

[leaf]

ereport.cpu.intel.quickpath.mem_unknown

Description:

Memory controller error of unknown type

**Payload 0**
Inherit version 0 from ereport
Inherit version 0 from ereport.cpu
Inherit version 0 from ereport.cpu.intel
Inherit version 0 from ereport.cpu.intel.quickpath
IA32_MCi_ADDR	uint64_t	MCi_ADDR raw value, included if MCi_STATUS.ADDRV indicates address valid
IA32_MCi_MISC	uint64_t	MCi_MISC raw value, included if MCi_STATUS.MISCV indicates misc register valid
IA32_MCi_STATUS	uint64_t	MCi_STATUS raw value
bank_msr_offset	uint64_t	MSR offset of MCi_CTL register for this bank
error_code	uint16_t	MCi_STATUS architectural error code - bits 15-0
error_enabled	boolean value	Set if MCi_STATUS.EN indicates #MC was enabled for this error type
error_uncorrected	boolean value	Set if MCi_STATUS.UC indicates uncorrected
model_specific_error_code	uint16_t	MCi_STATUS model-specific error code - bits 31-16
overflow	boolean_value	Set if MCi_STATUS.OVER indicates an overflow
processor_context_corrupt	boolean value	Set if MCi_STATUS.PCC indicates corruption
threshold_based_error_status	string	No tracking, Green - below threshold, Yellow - above threshold, Reserved
IA32_MCG_STATUS	uint64_t	MCG_STATUS value when MCA banks were read
bank_number	uint8_t	MCA bank number - N'th set of MCi{CTL,STATUS,ADDR,MISC}
ip	uint64_t	Instruction pointer for machine checks, if MCG_STATUS.EIPV
machine_check_in_progress	boolean value	MCG_STATUS.MCIP
mem_cor_ecc_counter	uint32_t[]	MC_COR_ECC_CNT dimm correctable ECC error counters
mem_cor_ecc_counter_last	uint32_t[]	MC_COR_ECC_CNT previouse dimm correctable ECC error counters
privileged	boolean value	For #MC indicates if interrupted IP was kernel/user

[leaf]

fault.cpu.generic-x86.mc

Description:

Error detected in memory controller

**Payload 0**
Inherit version 0 from fault
Inherit version 0 from fault.cpu
Inherit version 0 from fault.cpu.generic-x86

fault.cpu.intel.quickpath

Description:

Intel Quickpath Faults

**Payload 0**
Empty.

[leaf]

fault.cpu.intel.quickpath.interconnect

Description:

Quickpath Deteced Error.

**Payload 0**
Inherit version 0 from fault
Inherit version 0 from fault.cpu
Inherit version 0 from fault.cpu.intel
Inherit version 0 from fault.cpu.intel.quickpath

[leaf]

fault.cpu.intel.quickpath.mem_addr_parity

Description:

Bad parity detected in memory address.

**Payload 0**
Inherit version 0 from fault
Inherit version 0 from fault.cpu
Inherit version 0 from fault.cpu.intel
Inherit version 0 from fault.cpu.intel.quickpath

[leaf]

fault.cpu.intel.quickpath.mem_bad_addr

Description:

Memory access out of range.

**Payload 0**
Inherit version 0 from fault
Inherit version 0 from fault.cpu
Inherit version 0 from fault.cpu.intel
Inherit version 0 from fault.cpu.intel.quickpath

[leaf]

fault.cpu.intel.quickpath.mem_bad_id

Description:

Bad transaction tracker ID.

**Payload 0**
Inherit version 0 from fault
Inherit version 0 from fault.cpu
Inherit version 0 from fault.cpu.intel
Inherit version 0 from fault.cpu.intel.quickpath

[leaf]

fault.cpu.intel.quickpath.mem_parity

Description:

Bad parity detected in memory controller.

**Payload 0**
Inherit version 0 from fault
Inherit version 0 from fault.cpu
Inherit version 0 from fault.cpu.intel
Inherit version 0 from fault.cpu.intel.quickpath

[leaf]

fault.cpu.intel.quickpath.mem_redundant

Description:

Memory Mirror Broken.

**Payload 0**
Inherit version 0 from fault
Inherit version 0 from fault.cpu
Inherit version 0 from fault.cpu.intel
Inherit version 0 from fault.cpu.intel.quickpath

[leaf]

fault.cpu.intel.quickpath.mem_spare

Description:

Spare memory error.

**Payload 0**
Inherit version 0 from fault
Inherit version 0 from fault.cpu
Inherit version 0 from fault.cpu.intel
Inherit version 0 from fault.cpu.intel.quickpath

New Dictionary Entries

GMCA entry 33

type	Fault
severity	Major
keys	fault.cpu.generic-x86.mc

INTEL entry 44

type	Fault
severity	Major
keys	fault.cpu.intel.quickpath.mem_parity

INTEL entry 45

type	Fault
severity	Major
keys	fault.cpu.intel.quickpath.mem_addr_parity

INTEL entry 46

type	Fault
severity	Major
keys	fault.cpu.intel.quickpath.mem_bad_addr

INTEL entry 47

type	Fault
severity	Major
keys	fault.cpu.intel.quickpath.mem_spare

INTEL entry 48

type	Fault
severity	Major
keys	fault.cpu.intel.quickpath.mem_bad_id

INTEL entry 49

type	Fault
severity	Minor
keys	fault.cpu.intel.quickpath.mem_redundant

INTEL entry 50

type	Fault
severity	Major
keys	fault.cpu.intel.quickpath.interconnect

New Sets
PSARC/YYYY/XXX	Intel
events	ereport.cpu.generic-x86.internal_parity ereport.cpu.generic-x86.mc ereport.cpu.intel.internal_parity ereport.cpu.intel.quickpath.interconnect ereport.cpu.intel.quickpath.mem_addr_parity ereport.cpu.intel.quickpath.mem_bad_addr ereport.cpu.intel.quickpath.mem_bad_id ereport.cpu.intel.quickpath.mem_ce ereport.cpu.intel.quickpath.mem_parity ereport.cpu.intel.quickpath.mem_redundant ereport.cpu.intel.quickpath.mem_spare ereport.cpu.intel.quickpath.mem_ue ereport.cpu.intel.quickpath.mem_unknown fault.cpu.generic-x86.mc fault.cpu.intel.quickpath.interconnect fault.cpu.intel.quickpath.mem_addr_parity fault.cpu.intel.quickpath.mem_bad_addr fault.cpu.intel.quickpath.mem_bad_id fault.cpu.intel.quickpath.mem_parity fault.cpu.intel.quickpath.mem_redundant fault.cpu.intel.quickpath.mem_spare

ARC review is required.

End of ercheck report, errors found: 0